Memory having circuitry to directly change voltages applied to bit lines and word lines in response to transitions between a read operation, first rewrite operation, and second rewrite operation
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United States of America Patent
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Aug 3, 2010
Grant Date -
Sep 27, 2007
app pub date -
Mar 27, 2007
filing date -
Mar 27, 2006
priority date (Note) -
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Abstract
A memory capable of operating at a high speed is obtained. This memory includes memory cells arranged on the intersectional positions between bit lines and word lines respectively. A read operation and a first and second rewrite operations performed when reading data of the memory cells are started by changing voltages applied to the bit lines and the word lines to applied voltages responsive to each operation, and when each operation performed when reading data of the memory cells is transferred, the voltages applied to the bit lines and the word lines are directly changed from the applied voltages responsive to the operation before transition to the applied voltages responsive to the operation after transition.
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