Interferometric condition assessment system for a microelectronic structure including a semiconductor or free-metal material
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United States of America Patent
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Aug 10, 2010
Grant Date -
Jan 1, 2009
app pub date -
Jul 14, 2008
filing date -
Jul 26, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
An improved condition testing system and method includes a structure including a semiconductor material with a target portion and a second portion. The target portion has a first feature when at least one of the following occurs: an external force is received by the second portion of the structure and an internal condition occurs in the target portion. The system and method further has a interferogram shaped and located to produce a first optical interference pattern when the target portion and the interferogram are exposed to non-invasive illumination and when the target portion has the first feature. Further implementations use a second test interferogram spaced apart from the first test interferogram.
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