Resputtering process for eliminating dielectric damage
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United States of America Patent
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Aug 24, 2010
Grant Date -
N/A
app pub date -
Oct 26, 2006
filing date -
Mar 13, 2001
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Abstract
Methods of resputtering material from the wafer surface include at least one operation of resputtering material under a pressure of at least 10 mTorr. The methods can be used in conjunction with an iPVD apparatus, such as hollow cathode magnetron (HCM) or planar magnetron. The resputtered material may be a diffusion barrier material or a conductive layer material. The methods provide process conditions which minimize the damage to the dielectric layer during resputtering. The methods allow considerable etching of the diffusion barrier material at the via bottom, while not damaging exposed dielectric elsewhere on the wafer. Specifically, they provide a solution for the dielectric microtrenching problem occurring during conventional resputter process. Furthermore, the methods increase the etch rate to deposition rate ratio (E/D) and improve the etch back nonuniformity (EBNU) of resputter process. In general, the methods provide IC devices with higher reliability and decrease wafer manufacturing costs.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| NOVELLUS SYSTEMS INC | 3970 NORTH FIRST STREET SAN JOSE CA 95134 |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Hayden, Douglas | San Jose, US | 3 | 21 |
| Kailasam, Sridhar | Fremont, US | 13 | 811 |
| Rozbicki, Robert | San Francisco, US | 39 | 3369 |
| Yu, Chentao | Sunnyvale, US | 37 | 680 |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
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