Memory systems, on-die termination (ODT) circuits, and method of ODT control

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United States of America Patent

PATENT NO 7786752
APP PUB NO 20080159026A1
SERIAL NO

11873461

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Abstract

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According to one aspect, an on-die termination (ODT) circuit is controlled during transition from a first power mode to a second power mode of a memory device. The transition from an asynchronous ODT circuit path to a synchronous ODT circuit path is delayed to compensate for an operational latency of a delay locked loop (DLL) circuit.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU SUWON-SI GYEONGGI-DO 16677 16677

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jung, Dae-Hee Yongin-si, KR 9 82
Oh, Reum Seoul, KR 34 335

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