Non-volatile memory device manufacturing process testing systems and methods thereof
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United States of America Patent
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Sep 21, 2010
Grant Date -
Aug 21, 2008
app pub date -
Mar 4, 2008
filing date -
Jan 6, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Systems and methods of manufacturing and testing non-volatile memory (NVM) devices are described. According to one exemplary embodiment, a function test during manufacturing of the NVM modules is conducted with a system comprises a computer and a NVM tester coupling to the computer via an external bus. The NVM tester comprises a plurality of slots. Each of the slots is configured to accommodate respective one of the NVM modules to be tested. The NVM tester is configured to include an input/output interface, a microcontroller with associated RAM and ROM, a data generator, an address generator, a comparator, a comparison status storage space, a test result indicator and a NVM module detector. The data generator generates a repeatable sequence of data bits as a test vector. The known test vector is written to NVM of the NVM module under test. The known test vector is then compared with the data retrieved from the NVM module.
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