Low resistance gate for power MOSFET applications and method of manufacture
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United States of America Patent
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Oct 5, 2010
Grant Date -
Aug 16, 2007
app pub date -
Aug 29, 2006
filing date -
Feb 10, 2006
priority date (Note) -
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Abstract
A trench gate field effect transistor is formed as follows. A trench is formed in a semiconductor region, followed by a dielectric layer lining sidewalls and bottom of the trench and extending over mesa regions adjacent the trench. A conductive seed layer is formed in a bottom portion of the trench over the dielectric layer. A low resistance material is grown over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.
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