Vertical channel transistor structure and manufacturing method thereof
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United States of America Patent
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Oct 12, 2010
Grant Date -
Apr 17, 2008
app pub date -
Oct 11, 2006
filing date -
Oct 11, 2006
priority date (Note) -
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Abstract
A vertical channel transistor structure is provided. The structure includes a substrate, a channel, a cap layer, a charge trapping layer, a source and a drain. The channel is formed in a fin-shaped structure protruding from the substrate. The cap layer is deposited on the fin-shaped structure. The cap layer and the fin-shaped structure have substantially the same width. The charge trapping layer is deposited on the cap layer and on two vertical surfaces of the fin-shaped structure. The gate is deposited on the charge trapping layer and on two vertical surfaces of the fin-shaped structure. The source and the drain are respectively positioned on two sides of the fin-shaped structure and opposite the gate.
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