Methods and apparatus for synchronizing with a clock signal

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United States of America Patent

PATENT NO 7812657
APP PUB NO 20090115479A1
SERIAL NO

12345039

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Abstract

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Clock synchronization and skew adjustment circuits that utilize differing unit delay elements in their delay lines in either a graduated or a stepped unit time delay arrangement are for synchronizing with a clock signal. These graduated or a stepped unit time delays allow reduction in the number of the fine unit delay elements of the delay lines by placing a fine delay element granularity at the most critical timings to sense and adjust for the portion of the clock signal time period that are high speed or critical.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gomm, Tyler Meridian, US 50 641
Johnson, Gary Boise, US 72 1908

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