US Patent No: 7,822,968

Number of patents in Portfolio can not be more than 2000

Circuit having a multidimensional structure of configurable cells that include multi-bit-wide inputs and outputs

ALSO PUBLISHED AS: 20090146690

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Abstract

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A cascadable arithmetic and logic unit (ALU) which is configurable in function and interconnection. No decoding of commands is needed during execution of the algorithm. The ALU can be reconfigured at run time without any effect on surrounding ALUs, processing units or data streams. The volume of configuration data is very small, which has positive effects on the space required and the configuration speed. Broadcasting is supported through the internal bus systems in order to distribute large volumes of data rapidly and efficiently. The ALU is equipped with a power-saving mode to shut down power consumption completely. There is also a clock rate divider which makes it possible to operate the ALU at a slower clock rate. Special mechanisms are available for feedback on the internal states to the external controllers.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
PACT XPP TECHNOLOGIES AGZURICH87

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Münch, Robert Uhlandstrasse 30 10 88
Vorbach, Martin Gotthardstrasse 117a 140 2597

Cited Art Landscape

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MASSACHUSETTS INSTITUTE OF TECHNOLOGY (9)
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MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (8)
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6,567,834 Implementation of multipliers in programmable arrays 57 2000
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* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
* 8,812,287 Autonomous, scalable, digital system for emulation of wired-or hardware connection 0 2011
 
ARM FINANCE OVERSEAS LIMITED (1)
* 8,074,058 Providing extended precision in SIMD vector arithmetic operations 1 2009
* Cited By Examiner

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