Semiconductor chip having bond pads
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United States of America Patent
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Nov 2, 2010
Issued Date -
N/A
app pub date -
Dec 27, 2006
filing date -
Jul 10, 2001
priority date (Note) -
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Abstract
A semiconductor package includes a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern, The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region.
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