Process for making interconnect solder Pb-free bumps free from organo-tin/tin deposits on the wafer surface

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United States of America Patent

PATENT NO 7833897
SERIAL NO

11778678

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method is provided for making of interconnect solder bumps on a wafer or other electronic device without depositing any significant amount of tin or other solder component from the solder onto the wafer surface which tin can cause shorts or other defects in the wafer. The method is particularly useful for well-known C4NP interconnect technology. In one aspect of the invention, a reducing gas flow rate is used to remove oxides from the solder surfaces and wafer pad surfaces and is of a sufficient determined or pre-determined flow and/or chamber or mold/wafer spacing to provide a gas velocity across the solder surfaces and wafer pad surfaces so that Sn or other contaminants do not deposit on the wafer surface during solder transfer. In another aspect, the transfer contact is performed below the melting point of the solder and subsequently heated to above the melting temperature while in transfer contact. The heated solder in contact with the wafer pads is transferred to the wafer pads.

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Patent Owner(s)

Patent OwnerAddress
ULTRATECH INC3050 ZANKER ROAD SAN JOSE CA 95134

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Allen, Sean A Hopewell Junction, US 4 43
Garant, John J Poughkeepsie, US 17 69
Gorrell, Jerry A Lagrangeville, US 3 57
Knickerbocker, Sarah H Hopewell Junction, US 39 655
Palmatier, Phillip W Hopewell Junction, US 17 63
Tessler, Christopher L Poughquag, US 19 137

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