Stack package having pattern die redistribution
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United States of America Patent
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Nov 16, 2010
Issued Date -
N/A
app pub date -
Dec 29, 2006
filing date -
Jun 30, 2006
priority date (Note) -
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Abstract
A stack package includes an edge-pad-type first semiconductor chip having bonding pads arranged near the edges thereof. A pattern die is placed on the first semiconductor chip. The pattern die is smaller in size than the first semiconductor chip and has line-type-redistribution parts formed thereon. An edge-pad-type second semiconductor chip smaller in size than the pattern die is placed on the pattern die. Bonding wires electrically connect the bonding pads of the first semiconductor chip and the redistribution parts of the pattern die and also electrically connect the redistribution parts of the pattern die and bonding pads of the second semiconductor chip.
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