US Patent No: 7,836,252

Number of patents in Portfolio can not be more than 2000

System and method for optimizing interconnections of memory devices in a multichip module

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ALSO PUBLISHED AS: 20040044833
ATTORNEY / AGENT: (SPONSORED)
 

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Abstract

An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have the same propagation time regardless of which device is involved. The hub receives memory signals from a controller over a high speed data link which the hub translates into electrical data, command and address signals. These signals are applied to the memory devices over busses having equivalent path lengths. The busses may also be used by the memory devices to apply data signals to the memory hub. Such data signals can be converted by the memory hub into memory signals and applied to the controller over the high speed data link. In one example, the memory hub is located in the center of the memory module.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
MICRON TECHNOLOGY, INC.BOISE, ID18599

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ryan, Kevin J Eagle, ID 99 1643

Cited Art

Patent Info (Count) # Cites Year
 
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Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (1)
8,190,819 System and method for optimizing interconnections of memory devices in a multichip module 0 2010

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