Memory device and method
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United States of America Patent
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Nov 23, 2010
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N/A
app pub date -
Jun 6, 2008
filing date -
Jun 6, 2008
priority date (Note) -
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Abstract
During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.
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