Metallurgy for copper plated wafers

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7838991
SERIAL NO

11671422

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Improved protective metallization is described for bumped copper-top semiconductor chips. The semiconductor device includes a top wafer fabrication passivation layer with openings through which contact pads are exposed. A patterned copper layer is formed over the passivation layer and is electrically coupled to the contact pads through the openings. A metallic barrier layer is provided between the contact pads and the patterned copper layer. A titanium metallization layer overlies the patterned copper layer and cooperates with the barrier layer to envelop the copper layer in the regions of the contact pads. An aluminum metallization layer overlies the titanium metallization layer. An electrically insulating protective layer overlies the aluminum metallization and passivation layers. The protective layer includes openings in which underbump metallization stacks are formed. Each underbump metallization stack electrically connects to the aluminum metallization layer through an opening in the protective layer. Solder bumps adhere to the underbump metallization stacks.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
NATIONAL SEMICONDUCTOR CORPORATION12500 TI BOULEVARD M/S 3999 DALLAS TX 75243

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mostafazadeh, Shahram San Jose, US 53 2509
Patwardhan, Viraj Santa Clara, US 7 185

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation