
US Patent No: 7,853,747
Number of patents in Portfolio can not be more than 2000
Method and system for using an external bus controller in embedded disk controllers
Stats
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Dec 14, 2010
Issued date -
May 15, 2007
filing date -
11/803,458
serial no -
In Force
status
Importance
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Abstract
An embedded disk controller comprises a first processor in communication with a first bus and a second processor in communication with a second bus. An external bus controller (“EBC”) is located on the embedded disk controller, is coupled to an external bus and to at least one of the first bus and the second bus, and manages a plurality of memory devices external to the embedded disk controller via the external bus. A first one of the plurality of memory devices has at least one of different timing characteristics and a different data width than a second one of the plurality of memory devices.
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First Claim
Related Publications
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International Classification(s)
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- [Patents Count]
Cited Art
| Patent Info | (Count) | # Cites | Year |
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| 5,428,627 Method and apparatus for initializing an ECC circuit | 44 | 1992 | |
| 5,249,271 Buffer memory data flow controller | 89 | 1993 | |
| 5,627,695 System and method for generating unique sector identifiers for an identificationless disk format | 59 | 1995 | |
| 6,092,231 Circuit and method for rapid checking of error correction codes using cyclic redundancy check | 108 | 1998 | |
| 6,487,631 Circuit and method for monitoring sector transfers to and from storage medium | 40 | 1999 | |
| 6,530,000 Methods and systems for arbitrating access to a disk controller buffer memory by allocating various amounts of times to different accessing units | 42 | 1999 | |
| 6,330,626 Systems and methods for a disk controller memory architecture | 76 | 2000 | |
| 6,401,149 Methods for context switching within a disk controller | 114 | 2000 | |
| 7,039,771 Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers | 6 | 2003 | |
| 7,064,915 Method and system for collecting servo field data from programmable devices in embedded disk controllers | 9 | 2003 | |
| 7,080,188 Method and system for embedded disk controllers | 9 | 2003 | |
| 7,099,963 Method and system for monitoring embedded disk controller components | 9 | 2003 | |
| 7,219,182 Method and system for using an external bus controller in embedded disk controllers | 8 | 2003 | |
|
|
|||
| 4,603,382 Dynamic buffer reallocation | 142 | 1984 | |
| 5,014,186 Data-processing system having a packet transfer type input/output system | 76 | 1988 | |
| 5,506,989 Arbitration system limiting high priority successive grants | 45 | 1990 | |
| 5,146,585 Synchronized fault tolerant clocks for multiprocessor systems | 90 | 1990 | |
| 5,307,216 Sector identification method and apparatus for a direct access storage device | 47 | 1991 | |
| 5,487,170 Data processing system having dynamic priority task scheduling capabilities | 100 | 1993 | |
| 5,519,837 Pseudo-round-robin arbitration for a shared resource system providing fairness and high throughput | 66 | 1994 | |
| 5,568,606 Method and apparatus for maximizing effective disk capacity using adaptive skewing | 25 | 1994 | |
| 5,544,346 System having a bus interface unit for overriding a normal arbitration scheme after a system resource device has already gained control of a bus | 45 | 1994 | |
| 5,546,545 Rotating priority selection logic circuit | 54 | 1994 | |
| 5,692,135 Method and system for performing an asymmetric bus arbitration protocol within a data processing system | 38 | 1995 | |
|
|
|||
| 5,220,569 Disk array with error type indication and selection of error correction method | 77 | 1990 | |
| 5,162,954 Apparatus for generating an index pulse in a data storage system | 45 | 1990 | |
| 5,276,662 Disc drive with improved data transfer management apparatus | 96 | 1992 | |
| 5,745,793 Apparatus having a circular buffer that maintains a one entry gap between elements written to the microprocessor and elements operated on by the clock | 43 | 1995 | |
| 6,157,984 Integrated controller/processor for disc drive having direct memory access | 47 | 1997 | |
| 6,493,171 Adaptive skew setting for a disk drive | 15 | 2001 | |
| 6,728,054 Drive with adaptive data format and head switch sequencing | 15 | 2001 | |
| 6,765,744 Track pitch control using head offset measurement for self-servowriting tracks in a disc drive | 34 | 2001 | |
| 6,765,736 Write-safe condition verification apparatus and method for the write element in a disc drive | 9 | 2002 | |
| 6,924,953 Dual communication port sharing apparatus | 9 | 2002 | |
|
|
|||
| 5,193,197 Apparatus and method for distributed dynamic priority arbitration for access to a shared resource | 64 | 1990 | |
| 5,440,751 Burst data transfer to single cycle data transfer conversion and strobe signal conversion | 58 | 1991 | |
| 5,361,267 Scheme for error handling in a computer system | 78 | 1992 | |
| 5,408,644 Method and apparatus for improving the performance of partial stripe operations in a disk array subsystem | 112 | 1992 | |
| 5,787,483 High-speed data communications modem | 70 | 1995 | |
| 5,928,367 Mirrored memory dual controller disk storage system | 107 | 1996 | |
| 5,794,073 Arbitration system for a shared DMA logic on a network adapter with a large number of competing priority requests having predicted latency field | 63 | 1997 | |
| 6,594,721 Surprise hot bay swapping of IDE/ATAPI devices | 39 | 2000 | |
| 6,662,313 System and method for multiple cycle capture of chip state | 17 | 2000 | |
|
|
|||
| 5,500,848 Sector servo data recording disk having data regions without identification (ID) fields | 74 | 1993 | |
| 5,523,903 Sector architecture for fixed block disk drive | 119 | 1993 | |
| 5,615,190 Fixed- block architecture embedded servo disk drive without data identification (ID) regions | 64 | 1995 | |
| 5,937,435 System and method for skip-sector mapping in a data recording disk drive | 76 | 1996 | |
| 5,768,044 Zoned recording embedded servo disk drive having no data identification fields and reduced rotational latency | 41 | 1996 | |
| 6,124,994 System and method for providing nonadjacent redundancy synchronization bytes | 41 | 1997 | |
| 6,081,397 Method and apparatus for SID-to-SID period estimation | 34 | 1997 | |
| 6,574,699 Fast track reassign in a rotating storage media | 21 | 1999 | |
| 6,583,943 System and method for providing nonadjacent redundancy synchronization bytes | 14 | 2002 | |
|
|
|||
| 5,546,548 Arbiter and arbitration process for a dynamic and flexible prioritization | 66 | 1993 | |
| 5,574,867 Fast first-come first served arbitration method | 58 | 1994 | |
| 5,925,135 Clock rate compensation for a low frequency slave device | 50 | 1996 | |
| 5,968,180 Data capture circuit for asynchronous data transfer | 52 | 1997 | |
| 6,021,458 Method and apparatus for handling multiple level-triggered and edge-triggered interrupts | 26 | 1998 | |
| 6,134,676 Programmable hardware event monitoring method | 122 | 1998 | |
| 6,742,060 Look-up table based circuitry for sharing an interrupt between disk drive interfaces | 9 | 2000 | |
| 6,772,258 Method and apparatus for sharing an interrupt between disk drive interfaces | 8 | 2000 | |
| 2003/0204,655 Prioritizing vector generation in interrupt controllers | 17 | 2002 | |
|
|
|||
| 5,805,370 Head switching method for staggered servo and circuit thereof | 8 | 1994 | |
| 5,649,230 System for transferring data using value in hardware FIFO'S unused data start pointer to update virtual FIFO'S start address pointer for fast context switching | 84 | 1995 | |
| 5,835,299 Method for optimizing skew of hard disk drive | 24 | 1996 | |
| 6,094,320 Device and method for compensating for interhead track position offset due to the offset of tracks on disk surfaces | 51 | 1996 | |
| 6,108,150 Formation of servo information and method for servo control therefor in disk drive data storage system | 11 | 1997 | |
| 6,078,447 Staggered servo writing method in a hard disk drive employing staggered servo writing | 40 | 1997 | |
| 6,297,926 Device and method for compensating for interhead track position offset due to the offset of tracks on disk surfaces | 52 | 2000 | |
| 6,742,065 Interrupt controller and method of accessing interrupts | 14 | 2000 | |
|
|
|||
| 5,590,380 Multiprocessor system with processor arbitration and priority level setting by the selected processor | 22 | 1995 | |
| 5,659,759 Data processing device having improved interrupt controller to process interrupts of different priority levels | 40 | 1996 | |
| 5,890,210 Magnetic disk apparatus and command processing method thereof | 48 | 1996 | |
| 6,128,153 Head position control for a disk drive which performs recording about the rotational center even if the recorded servo information is eccentric | 28 | 1997 | |
| 6,115,778 Method and apparatus for handling interrupts through the use of a vector access signal | 20 | 1998 | |
| 6,950,258 Head positioning control method and device for storage disk apparatus | 8 | 2001 | |
| 6,947,233 Disk drive apparatus and method for compensating for error in servo-information-recorded position between heads | 11 | 2002 | |
|
|
|||
| 5,850,422 Apparatus and method for recovering a clock signal which is embedded in an incoming data stream | 72 | 1995 | |
| 5,734,848 Method and appartus for transferring data in a controller having centralized memory | 28 | 1995 | |
| 6,029,226 Method and apparatus having automated write data transfer with optional skip by processing two write commands as a single write command | 63 | 1996 | |
| 6,081,849 Method and structure for switching multiple contexts in storage subsystem target device | 79 | 1996 | |
| 6,134,063 Automated multi-track transfers | 41 | 1997 | |
| 6,496,517 Direct attach of interrupt controller to processor module | 12 | 2001 | |
| 7,174,401 Look ahead split release for a data bus | 9 | 2002 | |
|
|
|||
| 5,317,713 Micro-winchester disk drive having on-board segmented cache memory | 28 | 1991 | |
| 5,274,509 On-the-fly splitting of disk data blocks using timed sampling of a data position indicator | 69 | 1992 | |
| 5,465,343 Shared memory array for data block and control program storage in disk drive | 99 | 1993 | |
| 5,758,188 Synchronous DMA burst transfer protocol having the peripheral device toggle the strobe signal such that data is latched using both edges of the strobe signal | 82 | 1995 | |
| 5,729,718 System for determining lead time latency as function of head switch, seek, and rotational latencies and utilizing embedded disk drive controller for command queue reordering | 98 | 1996 | |
| 6,178,486 Time allocation shared memory arbitration for disk drive controller | 86 | 1998 | |
| 6,381,659 Method and circuit for controlling a first-in-first-out (FIFO) buffer using a bank of FIFO address registers capturing and saving beginning and ending write-pointer addresses | 82 | 1999 | |
|
|
|||
| 5,072,420 FIFO control architecture and method for buffer memory access arbitration | 95 | 1989 | |
| 5,822,142 Method of mapping logical sectors to physical sectors in a disk drive sparing partition | 96 | 1996 | |
| 6,067,206 Method and apparatus to compensate for servo wedge rotational offset after a head switch | 50 | 1997 | |
| 6,223,303 Disk drive having two tiered defect list comprising marginal and reserved data sectors | 76 | 1998 | |
| 6,279,089 Defective data site management through a shared defect management table | 54 | 1999 | |
| 6,490,635 Conflict detection for queued command handling in disk drive controller | 67 | 2000 | |
| 6,895,500 Disk drive for receiving setup data in a self monitoring analysis and reporting technology (SMART) command | 19 | 2001 | |
|
|
|||
| 5,592,404 Versatile error correction system | 50 | 1994 | |
| 5,623,672 Arrangement and method of arbitration for a resource with shared user request signals and dynamic priority assignment | 95 | 1994 | |
| 5,600,662 Error correction method and apparatus for headers | 78 | 1995 | |
| 5,740,466 Flexible processor-driven SCSI controller with buffer memory and local processor memory coupled via separate buses | 89 | 1996 | |
| 6,618,780 Method and apparatus for controlling interrupt priority resolution | 19 | 1999 | |
|
|
|||
| 5,133,062 RAM buffer controller for providing simulated first-in-first-out (FIFO) buffers in a random access memory | 101 | 1990 | |
| 5,557,764 Interrupt vector method and apparatus | 16 | 1995 | |
| 6,192,499 Device and method for extending error correction beyond one sector time | 56 | 1998 | |
| 6,662,334 Method and device for performing error correction on ECC data sectors | 52 | 1999 | |
|
|
|||
| 4,881,232 Method and apparatus for error correction | 77 | 1988 | |
| 4,975,915 Data transmission and reception apparatus and method | 89 | 1989 | |
| 4,972,417 PCM data transmitting apparatus and method | 75 | 1989 | |
| 6,944,703 Electronic device, information processing device, adapter device, and information exchange system | 8 | 2002 | |
|
|
|||
| 5,127,098 Method and apparatus for the context switching of devices | 90 | 1989 | |
| 5,339,443 Arbitrating multiprocessor accesses to shared resources | 105 | 1992 | |
| 5,664,121 Dual mode arbitration apparatus and method for reducing latency by allowing the possibility of simultaneous request and access for a shared bus | 41 | 1995 | |
| 5,912,906 Method and apparatus for recovering from correctable ECC errors | 129 | 1997 | |
|
|
|||
| 5,408,673 Circuit for continuous processing of video signals in a synchronous vector processor and method of operating same | 19 | 1993 | |
| 6,105,119 Data transfer circuitry, DSP wrapper circuitry and improved processor devices, methods and systems | 91 | 1997 | |
| 6,651,126 Snapshot arbiter mechanism | 18 | 2000 | |
| 2003/0037,225 Apparatus and method for microcontroller debugging | 49 | 2000 | |
|
|
|||
| 4,667,286 Method and apparatus for transferring data between a disk and a central processing unit | 57 | 1984 | |
| 5,027,357 ECC/CRC error detection and correction system | 67 | 1988 | |
| 5,157,669 Comparison of an estimated CRC syndrome to a generated CRC syndrome in an ECC/CRC system to detect uncorrectable errors | 70 | 1991 | |
|
|
|||
| 5,285,451 Failure-tolerant mass storage system | 90 | 1992 | |
| 5,315,708 Method and apparatus for transferring data through a staging memory | 67 | 1993 | |
| 5,890,207 High performance integrated cached storage device | 89 | 1996 | |
|
|
|||
| 4,920,535 Demultiplexer system | 51 | 1988 | |
| 5,983,293 File system for dividing buffer areas into different block sizes for system and user data | 57 | 1998 | |
| 6,714,373 Magnetic disk device having an improved seek control | 8 | 2000 | |
|
|
|||
| 5,285,327 Apparatus for controlling reading and writing in a disk drive | 64 | 1993 | |
| 5,835,930 One or more logical tracks per physical track in a headerless disk drive | 60 | 1996 | |
| 6,515,813 Method for controlling servo information detection timing and rotational speed of disk, and disk drive | 16 | 2001 | |
|
|
|||
| 4,805,046 Information recording and reproducing apparatus using sectors divided into a plurality of frames and having means for proper storage of the frame data | 57 | 1986 | |
| 4,949,342 Code error detecting method | 68 | 1988 | |
| 5,051,998 Data block deinterleaving and error correction system | 89 | 1989 | |
|
|
|||
| 5,692,165 Memory controller with low skew control signal | 162 | 1995 | |
| 6,065,053 System for resetting a server | 66 | 1997 | |
| 6,029,250 Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same | 319 | 1998 | |
|
|
|||
| 4,970,418 Programmable memory state machine for providing variable clocking to a multimode memory | 113 | 1989 | |
| 5,689,656 Dynamic hierarchical arbitration of computer resource access requests | 47 | 1997 | |
|
|
|||
| 5,602,857 Error correction method and apparatus | 72 | 1994 | |
| 6,314,480 Mixed-signal single-chip integrated system electronics for magnetic hard disk drives | 37 | 1999 | |
|
|
|||
| 5,280,488 Reed-Solomon code system employing k-bit serial techniques for encoding and burst error trapping | 67 | 1990 | |
| 5,491,701 Burst error corrector | 48 | 1994 | |
|
|
|||
| 5,581,715 IDE/ATA CD drive controller having a digital signal processor interface, dynamic random access memory, data error detection and correction, and a host interface | 109 | 1994 | |
| 6,721,828 Optical drive controller with a host interface for direct connection to an IDE/ATA data bus | 15 | 2002 | |
|
|
|||
| 5,563,896 Error correction processor and an error correcting method | 50 | 1995 | |
| 5,640,602 Transferring digital data in units of 2 bytes to increase utilization of a 2-byte-wide bus | 42 | 1995 | |
|
|
|||
| 5,243,471 Method and apparatus for detecting a start of data position in differing tracks | 49 | 1991 | |
| 5,276,564 Programmable start-of-sector pulse generator for a disk drive using embedded servo bursts and split data fields | 69 | 1992 | |
|
|
|||
| 6,201,655 Rotational storage device | 46 | 1998 | |
| 6,963,462 Servo detection control system, servo detection control method and hard disk drive | 10 | 2002 | |
|
|
|||
| 5,801,998 Dynamic random access memory | 38 | 1996 | |
| 5,831,922 Semiconductor device having a refresh device of a noise reduction type | 45 | 1997 | |
|
|
|||
| 6,470,461 Disk drive controller circuit and method for skipping defective and/or undesired sectors | 56 | 1999 | |
| 6,826,650 Disk controller configured to perform out of order execution of write operations | 42 | 2000 | |
|
|
|||
| 5,068,857 Error correction circuit | 46 | 1989 | |
| 5,361,266 Error correction circuit | 65 | 1993 | |
|
|
|||
| 5,117,442 Methods and circuits for synchronizing signals in a modular redundant fault tolerant computer system | 62 | 1988 | |
| 5,218,564 Layout efficient 32-bit shifter/register with 16-bit interface | 43 | 1991 | |
|
|
|||
| 5,276,807 Bus interface synchronization circuitry for reducing time between successive data transmission in a system using an asynchronous handshaking | 107 | 1990 | |
| 5,544,180 Error-tolerant byte synchronization recovery scheme | 44 | 1995 | |
|
|
|||
| 5,050,013 Hard sectoring circuit and method for a rotating disk data storage device | 57 | 1990 | |
| 5,068,755 Sector pulse generator for hard disk drive assembly | 54 | 1990 | |
|
|
|||
| 5,261,081 Sequence control apparatus for producing output signals in synchronous with a consistent delay from rising or falling edge of clock input signal | 51 | 1990 | |
| 5,179,704 Method and apparatus for generating disk array interrupt signals | 97 | 1991 | |
|
|
|||
| 4,390,969 Asynchronous data transmission system with state variable memory and handshaking protocol circuits | 81 | 1980 | |
| 5,818,886 Pulse synchronizing module | 41 | 1996 | |
|
|
|||
| 5,329,630 System and method using double-buffer preview mode | 68 | 1992 | |
|
|
|||
| 6,070,200 Host adapter having paged data buffers for continuously transferring data between a system bus and a peripheral bus | 93 | 1998 | |
|
|
|||
| 4,451,898 Asynchronous interface message transmission using source and receive devices | 44 | 1981 | |
|
|
|||
| 5,572,148 Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory | 169 | 1995 | |
|
|
|||
| 4,807,253 Time-varying trellis-coded modulation formats which are robust in channels with phase variations | 71 | 1987 | |
|
|
|||
| 5,626,949 Breathable shell for outerwear | 31 | 1995 | |
|
|
|||
| 5,375,248 Method for organizing state machine by selectively grouping status signals as inputs and classifying commands to be executed into performance sensitive and nonsensitive categories | 20 | 1993 | |
|
|
|||
| 5,237,593 Sequence synchronisation | 56 | 1990 | |
|
|
|||
| 4,777,635 Reed-Solomon code encoder and syndrome generator circuit | 80 | 1986 | |
|
|
|||
| 2002/0080,698 System and method for controlling spin speed of media in an optical disc drive | 11 | 2001 | |
|
|
|||
| 5,692,516 Single-nerve-action-potential-measuring apparatus | 9 | 1996 | |
|
|
|||
| 5,729,511 Optical disc system having servo motor and servo error detection assembly operated relative to monitored quad sum signal | 69 | 1995 | |
|
|
|||
| 6,711,643 Method and apparatus for interrupt redirection for arm processors | 29 | 2001 | |
|
|
|||
| 4,866,606 Loosely coupled distributed computer system with node synchronization for precision in real time applications | 82 | 1987 | |
|
|
|||
| 5,488,688 Data processor with real-time diagnostic capability | 181 | 1994 | |
|
|
|||
| 5,841,722 First-in, first-out (FIFO) buffer | 63 | 1997 | |
|
|
|||
| 5,204,859 Method and apparatus for detecting a frame alignment word in a data system | 42 | 1991 | |
|
|
|||
| 6,401,154 Flexible architecture for an embedded interrupt controller | 32 | 2000 | |
|
|
|||
| 6,574,676 System and method for scheduling disk drive commands by expected total access time | 65 | 2000 | |
|
|
|||
| 6,629,204 Disk array controller including a plurality of access paths | 23 | 2002 | |
|
|
|||
| 5,507,005 Data transferring system between host and I/O using a main buffer with sub-buffers where quantity of data in sub-buffers determine access requests | 53 | 1992 | |
|
|
|||
| 4,587,609 Lockout operation among asynchronous accessers of a shared computer system resource | 120 | 1983 | |
|
|
|||
| 6,285,632 Information-signal recording and reproducing apparatus | 17 | 2000 | |
|
|
|||
| 5,991,911 Concurrent generation of ECC error syndromes and CRC validation syndromes in a DVD storage device | 74 | 1997 | |
|
|
|||
| 5,719,516 Lock generator circuit for use with a dual edge register that provides a separate enable for each use of an input clock signal | 41 | 1995 | |
|
|
|||
| 6,041,417 Method and apparatus for synchronizing data received in an accelerated graphics port of a graphics memory system | 46 | 1998 | |
|
|
|||
| 4,275,457 Apparatus and method for receiving digital data at a first rate and outputting the data at a different rate | 48 | 1979 | |
|
|
|||
| 5,907,717 Cross-connected memory system for allocating pool buffers in each frame buffer and providing addresses thereof | 56 | 1996 | |
|
|
|||
| 2002/0131,402 Registering an IP phone with an IP phone switch | 2001 | ||
|
|
|||
| 5,257,143 Method and apparatus for positioning head of disk drive using zone-bit-recording | 58 | 1991 | |
|
|
|||
| 6,917,997 Integrated circuit including interrupt controller with shared preamble execution and global-disable control bit | 14 | 2001 | |
|
|
|||
| 5,271,018 Method and apparatus for media defect management and media addressing | 189 | 1990 | |
|
|
|||
| 6,694,398 Circuit for selecting interrupt requests in RISC microprocessors | 23 | 2001 | |
|
|
|||
| 5,088,093 Self-correcting registers, error-detecting/correcting registers, and inversion coding using one bit, and other information storage media | 41 | 1987 | |
|
|
|||
| 4,225,960 Automatic synchronizing system for digital asynchronous communications | 52 | 1979 | |
|
|
|||
| 6,952,749 Multiprocessor interrupt handling system and method | 31 | 2001 | |
|
|
|||
| 4,989,190 Apparatus for seeking a track of an optical disk in which information is recorded | 63 | 1988 | |
|
|
|||
| 6,728,814 Reconfigurable IEEE 1149.1 bus interface | 6 | 2000 | |
|
|
|||
| 4,860,333 Error protected central control unit of a switching system and method of operation of its memory configuration | 49 | 1987 | |
|
|
|||
| 5,023,612 Illegal sequence detection and protection circuit | 45 | 1989 | |
|
|
|||
| 5,583,999 Bus arbiter and bus arbitrating method | 58 | 1994 | |
|
|
|||
| 6,693,462 Low power dynamic logic gate with full voltage swing and two phase operation | 6 | 2002 | |
|
|
|||
| 5,420,984 Apparatus and method for rapid switching between control of first and second DMA circuitry to effect rapid switching beween DMA communications | 64 | 1993 | |
|
|
|||
| 6,807,595 Mobile communication device having a prioritized interrupt controller | 21 | 2001 | |
|
|
|||
| 5,136,592 Error detection and correction system for long burst errors | 82 | 1989 | |
|
|
|||
| 5,349,667 Interrupt control system for microprocessor for handling a plurality of maskable interrupt requests | 41 | 1992 | |
|
|
|||
| 5,109,500 Disk drive control unit having sets of operating command and operation length information and generating end signal based upon operation length information | 65 | 1987 | |
|
|
|||
| 5,854,918 Apparatus and method for self-timed algorithmic execution | 89 | 1996 | |
|
|
|||
| 4,811,282 Retiming circuit for pulse signals, particularly for microprocessor peripherals | 38 | 1986 | |
|
|
|||
| 5,784,569 Guaranteed bandwidth allocation method in a computer system for input/output data transfers | 86 | 1996 | |
|
|
|||
| 5,950,223 Dual-edge extended data out memory | 58 | 1997 | |
|
|
|||
| 6,081,867 Software configurable technique for prioritizing interrupts in a microprocessor-based system | 30 | 1998 | |
|
|
|||
| 4,625,321 Dual edge clock address mark detector | 41 | 1985 | |
|
|
|||
| 5,826,093 Dual function disk drive integrated circuit for master mode and slave mode operations | 32 | 1994 | |
|
|
|||
| 6,662,253 Shared peripheral architecture | 23 | 2000 | |
|
|
|||
| 6,421,760 Disk array controller, and components thereof, for use with ATA disk drives | 29 | 2000 | |
|
|
|||
| 4,486,750 Data transfer system | 51 | 1982 | |
|
|
|||
| 4,807,116 Interprocessor communication | 80 | 1987 | |
|
|
|||
| 7,054,236 Optical disk drive apparatus, optical pickup, manufacturing method therefor and adjusting method therefor | 10 | 2002 | |
|
|
|||
| 2001/0043,424 Servo skewing for track skew | 14 | 2001 | |
|
|
|||
| 4,812,769 Programmable sampling time base circuit | 46 | 1986 | |
|
|
|||
| 5,603,035 Programmable interrupt controller, interrupt system and interrupt control process | 32 | 1994 | |
|
|
|||
| 4,809,091 Disk apparatus | 55 | 1987 | |
|
|
|||
| 4,500,926 Data-recording apparatus | 56 | 1982 | |
|
|
|||
| 5,301,333 Tree structured variable priority arbitration implementing a round-robin scheduling policy | 138 | 1993 | |
|
|
|||
| 5,754,759 Testing and monitoring of programmed devices | 59 | 1996 | |
|
|
|||
| 6,880,030 Unified exception handling for hierarchical multi-interrupt architectures | 5 | 2000 | |
|
|
|||
| 5,844,844 FPGA memory element programmably triggered on both clock edges | 67 | 1997 | |
|
|
|||
| 5,691,994 Disk drive with fast error correction validation | 67 | 1995 | |
|
|
|||
| 4,486,827 Microprocessor apparatus | 33 | 1982 | |
|
|
|||
| 2006/0129,704 Method and system for monitoring embedded disk controller components | 5 | 2005 | |
| 2007/0226,392 Method and system for using an external bus controller in embedded disk controllers | 5 | 2007 | |
Patent Citation Ranking
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