Method and apparatus for preserving the context of tasks during task switching in a pipeline architecture

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United States of America Patent

PATENT NO 7853954
APP PUB NO 20060010308A1
SERIAL NO

11175296

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Abstract

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A microprocessor executes programs in a pipeline architecture including a task register management unit that, if a switch instruction to a second task is issued when a plurality of units executes a first task, switches a value of a task register to second register information that is used when the second task is executed after the execution of the first task is completed and a task manager that switches a value of a task identification information register to a second task identifier after the value is switched to the second register information, and grants each of the plurality of units permission to execute the second task.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 1050023 ?1050023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Haruki, Hiroyoshi Kanagawa-ken, JP 62 603
Hashimoto, Mikio Kanagawa-ken, JP 99 3266
Kawabata, Takeshi Tokyo, JP 109 1294

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