Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit
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United States of America Patent
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Dec 28, 2010
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N/A
app pub date -
Mar 31, 2008
filing date -
Mar 30, 2007
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Abstract
A differential sensing circuit and method for enhancing read margin of a memory device are disclosed. The differential sensing circuit includes a first current-to-voltage converter. The circuit includes a first current subtraction circuit having an erase reference cell. A first input terminal of the first current-to-voltage converter is coupled to the first current subtraction circuit. The circuit includes a second current-to-voltage converter. The circuit also includes a second current subtraction circuit having a program reference cell. A first input terminal of the second current-to-voltage converter is coupled to the second current subtraction circuit. Both the first and second current subtraction circuits are coupled to a memory access bias signal. Outputs of the first and second current-to-voltage converters are compared to generate an enhanced read margin output.
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