Semiconductor chip, method of fabricating the same and semiconductor chip stack package

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United States of America Patent

PATENT NO 7863747
SERIAL NO

12340273

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Abstract

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Provided are a semiconductor chip, a method of fabricating a semiconductor chip, and a semiconductor chip stack package. The semiconductor chip includes a semiconductor substrate and a semiconductor device on the semiconductor substrate. A dielectric covers the semiconductor device. A top metal is on the dielectric and electrically connected to the semiconductor device. A deep via penetrates the semiconductor substrate and the dielectric. An interconnection connects the deep via and the top metal electrically. A bump is in contact with the top metal and the interconnection.

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Patent Owner(s)

Patent OwnerAddress
ADEIA SEMICONDUCTOR TECHNOLOGIES LLC3025 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Min Hyung Cheongju-si, KR 59 741

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