Set algorithm for phase change memory cell

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United States of America Patent

PATENT NO 7869270
SERIAL NO

12345384

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Abstract

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Memory devices and methods for operating such devices are described herein. A method is described herein for operating a memory cell comprising phase change material and programmable to a plurality of resistance states including a high resistance state and a lower resistance state. The method comprises applying a first bias arrangement to the memory cell to establish the lower resistance state, the first bias arrangement comprising a first voltage pulse. The method further comprises determining whether the memory cell is in the lower resistance state, and if the memory cell is not in the lower resistance state then applying a second bias arrangement to the memory cell. The second bias arrangement comprises a second voltage pulse having a pulse height greater than that of the first voltage pulse.

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Patent Owner(s)

  • MACRONIX INTERNATIONAL CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Ming-Hsiu Hsinchu, TW 127 913

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