Non-volatile semiconductor memory with page erase
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United States of America Patent
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Jan 18, 2011
Issued Date -
N/A
app pub date -
May 28, 2009
filing date -
Mar 29, 2006
priority date (Note) -
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Abstract
In a nonvolatile memory, less than a full block may be erased as one or more pages. A select voltage is applied through pass transistors to each of plural selected wordlines and an unselect voltage is applied through pass transistor to each of plural unselected wordlines of a selected block. A substrate voltage is applied to the substrate of the selected block. A common select voltage may be applied to each selected wordline and the common unselect voltage may be applied to each unselected wordline. Select and unselect voltages may be applied to any of the wordlines of a select block. A page erase verify operation may be applied to a block having plural erased pages and plural nonerased pages.
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