System and method for lithography simulation

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United States of America Patent

PATENT NO 7873937
SERIAL NO

11527010

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Abstract

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A system has been developed for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the system accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques. In this regard, in one embodiment, the system employs a lithography simulation system architecture, including application-specific hardware accelerators, and a processing technique to accelerate and facilitate verification, characterization and/or inspection of a mask design, for example, RET design, including detailed simulation and characterization of the entire lithography process to verify that the design achieves and/or provides the desired results on final wafer pattern. The system includes: (1) general purpose-type computing device(s) to perform the case-based logic having branches and inter-dependency in the data handling and (2) accelerator subsystems to perform a majority of the computation intensive tasks.

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Patent Owner(s)

Patent OwnerAddress
ASML NETHERLANDS B VVELDHOVEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cao, Yu Cupertino, US 407 9726
Chen, Luoqi San Jose, US 43 1234
Chen, Xun Palo Alto, US 86 2069
Lu, Yen-Wen Los Altos, US 74 995
Ye, Jun Palo Alto, US 243 6444

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