System and method of forming a split-gate flash memory structure including partial circular sidewalls of the floating gates and control gates
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United States of America Patent
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Feb 8, 2011
Grant Date -
Jun 28, 2007
app pub date -
Nov 22, 2006
filing date -
Jun 22, 2004
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Abstract
A method for forming a split-gate flash memory structure includes etching a first gate layer to form one or more floating gates and forming an isolation layer over the floating gates. An insulation layer is deposited over the isolation layer and planarized.
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