Bus failure management method and system
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United States of America Patent
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Feb 22, 2011
Grant Date -
Oct 29, 2009
app pub date -
Apr 28, 2008
filing date -
Apr 28, 2008
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method, apparatus and program product improve computer reliability by, in part, identifying a plurality of error occurrences from Error Correction Codes. It may then be determined if the plurality of error occurrences are associated with a single bit of a bus. The determined, single bit may correspond to a faulty component of the bus. This level of identification efficiently addresses problems. For instance, a corrective algorithm may be applied if the plurality of error occurrences are associated with the single bit. Alternatively, the bus may be disabled if the plurality of error occurrences are not associated with the single bit of the bus. In this manner, implementations may detect, identify and act in response to multiple failure modes.
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