Methods and apparatus for implementing bit-by-bit erase of a flash memory device
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United States of America Patent
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Mar 15, 2011
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app pub date -
Oct 13, 2006
filing date -
May 8, 2006
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Abstract
A NAND memory device is constructed using Silicon On Insulator (SOI) techniques. In particular, Thin Film Transistor (TFT) techniques can be used to fabricate the NAND Flash memory device. In both SOI and TFT structures, the body, or well, is isolated. This can be used to enable a bit-by-bit programming and erasing of individual cells and allows tight control of the threshold voltage, which can enable MLC operation.
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