Multi-processor computer with plural boot memories

United States of America Patent

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Mar 15, 2011
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app pub date
Oct 31, 2006
filing date
Oct 31, 2006

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Abstract

The present invention provides a controller that allows plural processor nodes to access plural boot memories concurrently.

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Patent Owner	Address
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP	1701 EAST MOSSY OAKS ROAD SPRING TX 77389

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G06F:ELECTRIC DIGITAL DATA PROCESSING

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Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Cavanna, Vincent E	Roseville, US	7	77

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Multi-processor computer with plural boot memories

Number of patents in Portfolio can not be more than 2000

United States of America Patent

11590080

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PATENT NO	7908470
SERIAL NO	11590080
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11590080

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