Method of reducing coupling between floating gates in nonvolatile memory
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United States of America Patent
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Mar 22, 2011
Grant Date -
Feb 25, 2010
app pub date -
Sep 25, 2009
filing date -
Sep 21, 2006
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Abstract
A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.
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