Method and system for a fast-switching phase-locked loop using a direct digital frequency synthesizer
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United States of America Patent
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Mar 29, 2011
Grant Date -
Mar 25, 2010
app pub date -
Nov 30, 2009
filing date -
Feb 28, 2007
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Abstract
Aspects of a method and system for a fast-switching Phase-Locked Loop using a Direct Digital Frequency synthesizer may include generating a second signal from a first signal by: translating an inphase component of said first signal in frequency via a filtered fast-switching oscillating signal generated using at least a direct digital frequency synthesizer (DDFS), and translating a corresponding quadrature component of said first signal in frequency via a phase-shifted version of said generated filtered fast-switching oscillating signal. The inphase and quadrature components of the first signal may be multiplied with the filtered fast-switching oscillating signal and a phase-shifted version of the filtered fast-switching oscillating signal, respectively. The filtered fast-switching oscillating signal may be obtained by removing at least one frequency-sum term of the fast-switching oscillating signal, where the fast-switching signal oscillating signal may be generated from a signal generated by the DDFS that may be multiplied with an oscillating reference signal.
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