System and method for performing masked store operations in a processor
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United States of America Patent
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Apr 5, 2011
Grant Date -
Jun 26, 2008
app pub date -
Dec 22, 2006
filing date -
Dec 22, 2006
priority date (Note) -
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Abstract
A system and method for accelerated handling of masked store operations in a processor or processor-based system/chip are described. A set of instructions that support a store operation under a per-byte predicate mask is provided. The invention accelerates the handling of small transfers at arbitrary alignments, such as those used by xDSL modems to deal with ATM cells or Reed Solomon codewords.
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