Wafer level chip packaging

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7936062
APP PUB NO 20070190691A1
SERIAL NO

11655777

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Packaged microelectronic elements are provided. In an exemplary embodiment, a microelectronic element having a front face and a plurality of peripheral edges bounding the front face has a device region at the front face and a contact region with a plurality of exposed contacts adjacent to at least one of the peripheral edges. The packaged element may include a plurality of support walls overlying the front face of the microelectronic element such that a lid can be mounted to the support walls above the microelectronic element. For example, the lid may have an inner surface confronting the front face. In a particular embodiment, some of the contacts can be exposed beyond edges of the lid.

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Patent Owner(s)

Patent OwnerAddress
ADEIA SEMICONDUCTOR TECHNOLOGIES LLC3025 ORCHARD PARKWAY SAN JOSE CA 95134

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aksenton, Yulia Jerusalem, IL 4 840
Avsian, Osher Kiryat Ono, IL 6 899
Burtzlaff, Robert San Jose, US 9 1003
Dayan, Avi Jerusalem, IL 3 823
Grinman, Andrey Jerusalem, IL 13 1160
Hazanovich, Felix Jerusalem, IL 4 835
Hecht, Ilya Beit Shemesh, IL 3 823
Humpston, Giles Aylesbury, GB 82 4077
Nystrom, Michael J San Jose, US 41 1592
Oganesian, Vage Palo Alto, US 149 6013
Ovrutsky, David Ashkelon, IL 40 2056
Reifel, Mitchell Hayes San Jose, US 2 153
Rosenstein, Charles Ramat Beit Shemesh, IL 11 1303

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