Method, system, and computer program product for predicting thin film integrity, manufacturability, reliability, and performance in electronic designs

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7937674
APP PUB NO 20080160646A1
SERIAL NO

11866386

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Abstract

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Disclosed is an improved method, system, and computer program product for predicting and improving the integrity, manufacturability, reliability, and performance of an electronic circuit feature based on the stresses or strains of design features of electronic designs. Some embodiments identify the design, the concurrent model(s), design feature physical or electrical parameters or attributes, analyzes the stresses or strains to predict the integrity of the design and determines whether the design meets the design objectives or constraints. Some other embodiments make corrections to the designs or the processes based upon the determination of whether the design meets the design objectives or constraints. Some other embodiments compute the variations of the design features as a result of the stresses or strains and determine their impact on the subsequent processes.

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Patent Owner(s)

Patent OwnerAddress
CADENCE DESIGN SYSTEMS INC2655 SEELY AVENUE SAN JOSE CA 95134

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Scheffer, Louis K Campbell, US 39 1245
White, David San Jose, US 206 7185

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