Asynchronous set-reset circuit device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 10, 2011
Grant Date -
Dec 27, 2007
app pub date -
Jun 7, 2007
filing date -
Jun 8, 2006
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An asynchronous set-reset circuit device for testing activity performed by an Automatic Test Patterns Generation tool may include a pair of logic gates having at least two inputs each, and a logic gate structure coupled upstream from the pair of logic gates. The logic gate structure may be for driving one respective input of the pair of logic gates and may have inputs receiving a pair of test command signals. The asynchronous set-reset circuit device may also include a plurality of feedback connections between outputs of the pair of logic gates and respective inputs of the logic gate structure.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully