US Patent No: 7,952,169

Number of patents in Portfolio can not be more than 2000

Isolation circuit

ALSO PUBLISHED AS: 20090224242

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An isolation circuit, comprising a first transistor having a gate, a first source/drain terminal, and a second source/drain terminal, a first pad coupled to the gate of the first transistor, the first pad operable to receive an enable signal, a second pad coupled to the first source/drain of the first transistor, the second pad operable to receive a ground potential, a first fuse device coupling the second source/drain terminal to a node, a second fuse device coupling the node to the first pad, a third pad operable to receive a signal to be applied to at least one die, and a second transistor operable to selectively transfer the signal received at the third pad to the at least one die in response to a control signal provided by the node.

Loading the Abstract Image... loading....

First Claim

See full text

all claims..

Related Publications

Loading Related Publications... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
MICRON TECHNOLOGY, INC.BOISE, ID21560

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cowles, Timothy B Boise, ID 168 1284
Lunde, Aron T Boise, ID 21 87

Cited Art Landscape

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (43)
5,059,899 Semiconductor dies and wafers and methods for making 168 1990
5,301,159 Anti-fuse circuit and method wherein the read operation and programming operation are reversed 35 1993
5,469,393 Circuit and method for decreasing the cell margin during a test mode 62 1993
5,424,672 Low current redundancy fuse assembly 46 1994
5,457,659 Programmable dynamic random access memory (DRAM) 78 1994
5,508,638 Low current redundancy fuse assembly 116 1995
5,661,690 Circuit and method for performing tests on memory array cells using external sense amplifier reference current 25 1996
5,734,661 Method and apparatus for providing external access to internal integrated circuit test circuits 23 1996
6,130,811 Device and method for protecting an integrated circuit during an ESD event 23 1997
5,757,705 SDRAM clocking test mode 35 1997
5,754,486 Self-test circuit for memory integrated circuits 38 1997
6,025,730 Direct connect interconnect for testing semiconductor dice and wafers 53 1997
5,809,038 Method and apparatus for reading compressed test data from memory devices 26 1997
5,994,915 Reduced terminal testing system 46 1997
6,114,878 Circuit for contact pad isolation 21 1998
6,246,250 Probe card having on-board multiplex circuitry for expanding tester resources 57 1998
6,313,658 Device and method for isolating a short-circuited integrated circuit (IC) from other IC's on a semiconductor wafer 25 1998
6,052,321 Circuit and method for performing test on memory array cells using external sense amplifier reference current 18 1998
6,275,058 Method and apparatus for properly disabling high current parts in a parallel test environment 15 1999
6,337,577 Interconnect and system for testing bumped semiconductor components with on-board multiplex circuitry for expanding tester resources 33 1999
6,204,678 Direct connect interconnect for testing semiconductor dice and wafers 22 1999
6,094,388 Methods of identifying defects in an array of memory cells and related integrated circuitry 14 1999
6,300,786 Wafer test method with probe card having on-board multiplex circuitry for expanding tester resources 36 1999
6,396,300 Circuit and method for contact pad isolation 26 1999
6,462,575 Method and system for wafer level testing and burning-in semiconductor components 27 2000
6,433,574 Interconnect and system for testing bumped semiconductor components with on-board multiplex circuitry for expanding tester resources 13 2000
6,417,695 Antifuse reroute of dies 31 2001
6,472,239 Method for fabricating semiconductor components 20 2001
6,522,161 Method and apparatus for properly disabling high current parts in a parallel test environment 9 2001
6,538,264 Semiconductor reliability test chip 11 2001
6,809,378 Structure for temporarily isolating a die from a common conductor to facilitate wafer level testing 5 2001
6,525,982 Methods of programming and circuitry for a programmable element 11 2001
6,366,112 Probe card having on-board multiplex circuitry for expanding tester resources 21 2001
6,466,047 System for testing bumped semiconductor components with on-board multiplex circuit for expanding tester resources 14 2001
6,545,510 Input buffer and method for voltage level detection 10 2001
2002/0133,769 Circuit and method for test and repair 19 2001
6,484,279 Testing system for evaluating integrated circuits, a testing system, and a method for testing an integrated circuit 36 2002
6,967,348 Signal sharing circuit with microelectric die isolation features 13 2002
7,026,646 Isolation circuit 4 2002
6,630,685 Probe look ahead: testing parts not currently under a probehead 18 2002
6,640,323 Testing system for evaluating integrated circuits, a testing system, and a method for testing an integrated circuit 20 2002
7,378,290 Isolation circuit 7 2004
2006/0131,577 Isolation circuit 3 2006
 
ROUND ROCK RESEARCH, LLC (7)
5,301,143 Method for identifying a semiconductor die using an IC with programmable links 117 1992
5,594,694 Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell 56 1995
5,706,235 Memory circuit with switch for selectively connecting an I/O pad directly to a nonvolatile memory cell and method for operating same 17 1997
5,995,426 Testing parameters of an electronic device 18 1997
5,896,400 Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell 28 1997
6,094,377 Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell 10 1999
6,104,651 Testing parameters of an electronic device 23 1999
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (5)
5,446,695 Memory device with programmable self-refreshing and testing methods therefore 81 1994
5,502,333 Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit 211 1994
5,485,032 Antifuse element with electrical or optical programming 30 1994
5,679,609 Fabrication, testing and repair of multichip semiconductor structures having connect assemblies with fuses 18 1996
5,996,096 Dynamic redundancy for random access memory assemblies 47 1996
 
TEXAS INSTRUMENTS INCORPORATED (5)
4,970,454 Packaged semiconductor device with test circuits for determining fabrication parameters 69 1990
5,648,730 Large integrated circuit with modular probe structures 17 1994
6,844,751 Multi-state test structures and methods 15 2001
6,590,225 Die testing using top surface test pads 9 2002
6,844,218 Semiconductor wafer with grouped integrated circuit die having inter-die connections for group testing 14 2002
 
LSI LOGIC CORPORATION (4)
5,442,282 Testing and exercising individual, unsingulated dies on a wafer 104 1992
5,648,661 Integrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the dies 77 1994
5,539,325 Testing and exercising individual, unsingulated dies on a wafer 54 1995
5,838,163 Testing and exercising individual, unsingulated dies on a wafer 76 1995
 
XILINX, INC. (4)
5,486,707 Antifuse structure with double oxide layers 33 1994
5,506,518 Antifuse-based programmable logic circuit 20 1994
5,486,776 Antifuse-based programmable logic circuit 52 1994
5,502,000 Method of forming a antifuse structure with increased breakdown at edges 31 1995
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (3)
5,956,567 Semiconductor chip and semiconductor wafer having power supply pads for probe test 32 1997
6,459,290 Test apparatus of integrated circuit 4 2000
6,838,891 Semiconductor device 8 2002
 
SHARP KABUSHIKI KAISHA (3)
4,847,810 Memory having redundancy circuit 26 1987
4,791,319 Semiconductor device with redundancy circuit and means for activating same 46 1987
5,502,674 Method and apparatus for repair of memory by redundancy 32 1994
 
UNISYS CORPORATION (3)
4,479,088 Wafer including test lead connected to ground for testing networks thereon 56 1981
4,467,400 Wafer scale integrated circuit 120 1982
4,812,742 Integrated circuit package having a removable test region for testing for shorts and opens 23 1987
 
ACTEL CORPORATION (2)
5,485,031 Antifuse structure suitable for VLSI application 94 1993
5,498,895 Process ESD protection devices for use with antifuses 22 1994
 
FUJITSU SEMICONDUCTOR LIMITED (2)
6,228,684 Wafer-level package, a method of manufacturing thereof and a method of manufacturing semiconductor devices from such a wafer-level package 64 1999
6,365,443 Method of manufacturing a semiconductor device having data pads formed in scribed area 20 2000
 
Prolinx Labs Corporation (2)
5,537,108 Method and structure for programming fuses 44 1994
5,726,482 Device-under-test card for a burn-in board 13 1994
 
ADVANCED MICRO DEVICES, INC. (1)
4,689,494 Redundancy enable/disable circuit 68 1986
 
AT&T Bell Laboratories (1)
5,099,149 Programmable integrated circuit 56 1990
 
ERIM INTERNATIONAL, INC. (1)
5,490,042 Programmable silicon circuit board 32 1992
 
FREESCALE SEMICONDUCTOR, INC. (1)
6,577,148 Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer 15 1995
 
HON HAI PRECISION INDUSTRY CO., LTD. (1)
6,362,087 Method for fabricating a microelectronic fabrication having formed therein a redistribution structure 132 2000
 
INTEGRATED SILICON SOLUTION, INC. (1)
5,548,560 Synchronous static random access memory having asynchronous test mode 46 1995
 
KABUSHIKI KAISHA TOSHIBA (1)
7,365,555 Semiconductor device, method for testing the same and IC card 1 2006
 
KAWASAKI MICROELECTRONICS, INC. (1)
6,836,133 Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit 10 2002
 
MITSUBISHI DENKI KABUSHIKI KAISHA (1)
6,605,861 Semiconductor device 19 2001
 
MOSAIC SYSTEM, INC. 1497 MAPLE LANE TROY, MICHIGAN 48084 A CORP OF (1)
4,458,297 Universal interconnection substrate 132 1982
 
NATIONAL SEMICONDUCTOR CORPORATION (1)
4,379,259 Process of performing burn-in and parallel functional testing of integrated circuit memories in an environmental chamber 91 1980
 
NXP B.V. (1)
4,918,379 Integrated monolithic circuit having a test bus 34 1988
 
OTRSOTECH, LLC (1)
6,133,582 Methods and apparatuses for binning partially completed integrated circuits based upon test results 64 1998
 
PS4 LUXCO S.A.R.L. (1)
2008/0169,467 Semiconductor device 1 2008
 
Pycon, Inc. (1)
5,966,021 Apparatus for testing an integrated circuit in an oven during burn-in 33 1996
 
QUICKLOGIC CORPORATION (1)
5,495,181 Integrated circuit facilitating simultaneous programming of multiple antifuses 58 1994
 
ROHM CO., LTD. (1)
5,502,668 Semiconductor memory device capable of low-voltage programming 12 1994
 
SAMSUNG ELECTRONICS CO., LTD. (1)
6,121,677 Reduced size integrated circuits and methods using test pads located in scribe regions of integrated circuits wafers 27 1998
 
SEIKO EPSON CORPORATION (1)
6,714,031 Semiconductor device for wafer examination 20 2002
 
SGS-THOMSON MICROELECTRONICS S.R.L. (1)
5,696,404 Semiconductor wafers with device protection means and with interconnect lines on scribing lines 19 1995
 
SGS-THOMSON MICROELECTRONICS, INC. (1)
5,500,588 Method and apparatus for testing integrated circuit devices 12 1994
 
SIEMENS AKTIENGESELLSCHAFT (1)
4,752,929 Method of operating a semiconductor memory with a capability of testing, and an evaluation circuit for performing the method 46 1986
 
STEINMETZ ELECTRICAL LLC (1)
5,059,835 CMOS circuit with programmable input threshold 32 1987
 
STMICROELECTRONICS, INC. (1)
5,848,018 Memory-row selector having a test function 30 1997
 
TDC ACQUISITION HOLDINGS, INC. (1)
6,763,282 Method and system for controlling a robot 86 2001
 
TEKTRONIX, INC. (1)
6,366,766 Input protection circuit for a radio frequency 7 2000
 
TESSERA ADVANCED TECHNOLOGIES, INC. (1)
7,550,763 Semiconductor integrated circuit device and manufacture thereof 5 2007
 
VLSI TECHNOLOGY, INC. (1)
5,495,436 Anti-fuse ROM programming circuit 52 1995
 
Other [Check patent profile for assignment information] (1)
4,961,053 Circuit arrangement for testing integrated circuit components 135 1988

Patent Citation Ranking

Forward Cite Landscape

  • No Forward Cites to Display

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
3.5 Year Payment $1600.00 $800.00 $400.00 Nov 30, 2014
7.5 Year Payment $3600.00 $1800.00 $900.00 Nov 30, 2018
11.5 Year Payment $7400.00 $3700.00 $1850.00 Nov 30, 2022
Fee Large entity fee small entity fee micro entity fee
Surcharge - 3.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00