Address translation system for use in a simulation environment
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United States of America Patent
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Jun 7, 2011
Grant Date -
Sep 18, 2008
app pub date -
Mar 16, 2007
filing date -
Mar 16, 2007
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Abstract
Methods and systems for simulation of a testable system are provided in which a virtual testable system is used. One method includes inputting a system definition file into a translation utility, where the system definition file includes a plurality of physical addresses required for execution of the system definition file in the testable system. The method also includes inputting a memory map file into the translation utility, the memory map representing a virtual memory space for a virtual testable system. The method further includes generating virtual translation information by translating the physical addresses into virtual addresses using the memory map file.
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