Register pointer trap to prevent errors due to an invalid pointer value in a register
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United States of America Patent
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Jun 21, 2011
Issued Date -
N/A
app pub date -
Dec 20, 2004
filing date -
Jun 1, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
Trap flags and a pointer trap are associated with registers in a processor. Each trap flag indicates whether a corresponding register has been written with valid data. If not, the trap flag is set to indicate that the register corresponding to the trap flag contains invalid data. During instruction processing, the pointer trap receives control signals from instruction fetch/decode logic on the processor indicating an instruction being processed calls for a register to be used as a pointer. If the specified pointer register has its corresponding trap flag set, then the pointer trap indicates that a processing exception has occurred. The interrupt logic/exception processing logic then causes a trap interrupt service routine (ISR) to be executed in response to the exception. The ISR prevents errors from being introduced in the instruction processing due to invalid pointer values.
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