Address window support for direct memory access translation
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United States of America Patent
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Jul 19, 2011
Grant Date -
Apr 22, 2010
app pub date -
Dec 29, 2009
filing date -
Jun 21, 2005
priority date (Note) -
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status (Latency Note)
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Abstract
An apparatus is disclosed. The apparatus includes a remapping circuit to facilitate access of one or more I/O devices to a memory device for direct memory access (DMA) transactions. The remapping circuit of the apparatus includes a translation mechanism to perform memory address translations for I/O DMA transactions via address window-based translations.
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