Method for manufacturing dual gate in semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7989281
APP PUB NO 20090093097A1
SERIAL NO

12104819

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Abstract

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Provided is a method for manufacturing a dual gate in a semiconductor device. The method includes forming a gate insulating layer and a gate conductive layer on a semiconductor substrate, forming a diffusion barrier layer on the gate conductive layer, forming a barrier metal layer on the diffusion barrier layer, depositing a first gate metal layer on the barrier metal layer, forming a metal nitride barrier layer on a surface of the first gate metal layer by supplying nitrogen (N2) plasma on the first gate metal layer, forming a second gate metal layer on the metal nitride barrier layer, and forming a hard mask layer on the second gate metal layer.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
HYNIX SEMICONDUCTOR INC.KYOUNGKI-DO4173

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kim, Hyun Phill Icheon-si, KR 3 4

Cited Art Landscape

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (1)
* 6943416 Method and structure for reducing resistance of a semiconductor device feature 12 2003
 
PS4 LUXCO S.A.R.L. (1)
* 6800543 Semiconductor device having a low-resistance gate electrode 12 2002
 
ELPIDA MEMORY, INC. (1)
* 2008/0061,386 SEMICONDUCTOR DEVICE INCLUDING A GATE ELECTRODE HAVING A POLYMETAL STRUCTURE 4 2007
 
GLOBALFOUNDRIES INC. (1)
2006/0208,323 Dual gate dielectric thickness devices 3 2006
 
SAMSUNG ELECTRONICS CO., LTD. (1)
* 2007/0052,043 Multilayer gate electrode, semiconductor device having the same and method of fabricating the same 6 2006
 
AU OPTRONICS CORPORATION (1)
2007/0290,227 Dual-gate transistor and pixel structure using the same 9 2007
 
HYNIX SEMICONDUCTOR INC. (3)
* 7541269 Method of forming tungsten polymetal gate having low resistance 2 2007
* 2008/0081,452 METHOD OF FORMING TUNGSTEN POLYMETAL GATE HAVING LOW RESISTANCE 8 2007
* 2008/0157,205 SEMICONDUCTOR DEVICE WITH GATE STRUCTURE AND METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE 3 2007
 
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. (1)
* 6306743 Method for forming a gate electrode on a semiconductor substrate 39 2001
* Cited By Examiner

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