Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon

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United States of America Patent

PATENT NO 7994068
APP PUB NO 20100184259A1
SERIAL NO

12750596

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Abstract

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A method for fabricating a 3-D monolithic memory device. Silicon-oxynitride (Si.sub.xO.sub.yN.sub.z) on amorphous carbon is used an effective, easily removable hard mask with high selectivity to silicon, oxide, and tungsten. A silicon-oxynitride layer is etched using a photoresist layer, and the resulting etched Si.sub.xO.sub.yN.sub.z layer is used to etch an amorphous carbon layer. Silicon, oxide, and/or tungsten layers are etched using the amorphous carbon layer. In one implementation, conductive rails of the 3-D monolithic memory device are formed by etching an oxide layer such as silicon dioxide (SiO.sub.2) using the patterned amorphous carbon layer as a hard mask. Memory cell diodes are formed as pillars in polysilicon between the conductive rails by etching a polysilicon layer using another patterned amorphous carbon layer as a hard mask. Additional levels of conductive rails and memory cell diodes are formed similarly to build the 3-D monolithic memory device.

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Patent Owner(s)

Patent OwnerAddress
SANDISK TECHNOLOGIES LLC6900 DALLAS PARKWAY SUITE 325 PLANO TX 75024

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Konevecki, Michael W San Jose, US 19 1171
Radigan, Steven J Fremont, US 39 690

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