Peak voltage detector circuit and binarizing circuit including the same circuit
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United States of America Patent
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Aug 30, 2011
Grant Date -
Sep 4, 2008
app pub date -
Dec 11, 2007
filing date -
Jul 6, 2006
priority date (Note) -
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Abstract
A peak voltage detector circuit detects a peak voltage of an input voltage. The input voltage is input into a first input terminal of a comparator. A counter circuit counts up a counter value in synchronization with a first clock signal, when a signal output from the comparator is in a first state. The counter circuit counts down the counter value in synchronization with a second clock signal. A digital-analog conversion circuit outputs an output voltage corresponding to the counter value, and the output voltage is input into a second input terminal of the comparator. The first clock signal has a wave period shorter than that of the second clock signal.
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