Method for wafer analysis with artificial neural network and system thereof

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United States of America Patent

PATENT NO 8010468
APP PUB NO 20080301073A1
SERIAL NO

11872414

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Abstract

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A method for wafer analysis with artificial neural network and the system thereof are disclosed. The method of the system of the present invention has several steps, including: first of all, providing a test unit for wafer test and generating a plurality of test data; next, transmitting the test data to a processing unit for transferring to output data; then, comparing the output data with predictive value and modifying bias and making the output data close to the predictive value, and repeating the steps mentioned above to train this system; finally, analyzing wafers by the trained system. Using this system to analyze wafers not only saves time, but also reduces manpower and the risk resulting from artificial analysis.

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Patent Owner(s)

Patent OwnerAddress
KING YUAN ELECTRONICS CO LTDHSINCHU CITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tsai, Ming-Chin Hsin-Chu, TW 25 421

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