States encoding in multi-bit flash cells for optimizing error rate
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United States of America Patent
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Aug 30, 2011
Grant Date -
Apr 30, 2009
app pub date -
Dec 30, 2008
filing date -
Nov 8, 2004
priority date (Note) -
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status (Latency Note)
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Abstract
To store N bits of M≧2 logical pages, the bits are interleaved and the interleaved bits are programmed to [N/M] memory cells, M bits per cell. Preferably, the interleaving puts the same number of bits from each logical page into each bit-page of the [N/M] cells. When the bits are read from the cells, the bits are de-interleaved. The interleaving may be deterministic or random, and may be effected by software or by dedicated hardware.
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