Triple parity technique for enabling efficient recovery from triple failures in a storage array

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United States of America Patent

PATENT NO 8015472
SERIAL NO

12195968

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Abstract

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A triple parity (TP) technique reduces overhead of computing diagonal and anti-diagonal parity for a storage array adapted to enable efficient recovery from the concurrent failure of three storage devices in the array. The diagonal parity is computed along diagonal parity sets that collectively span all data disks and a row parity disk of the array. The parity for all of the diagonal parity sets except one is stored on the diagonal parity disk. Similarly, the anti-diagonal parity is computed along anti-diagonal parity sets that collectively span all data disks and a row parity disk of the array. The parity for all of the anti-diagonal parity sets except one is stored on the anti-diagonal parity disk. The TP technique provides a uniform stripe depth and an optimal amount of parity information.

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Patent Owner(s)

Patent OwnerAddress
NETAPP INCSAN JOSE CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Corbett, Peter F Lexington, US 76 3626
Goel, Atul Foster City, US 86 1900

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