Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology
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United States of America Patent
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Sep 20, 2011
Grant Date -
May 26, 2011
app pub date -
Nov 25, 2009
filing date -
Nov 25, 2009
priority date (Note) -
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Abstract
A semiconductor fabrication method comprises providing a structure which includes a semiconductor substrate having a plurality of subsurface layers, the substrate comprising a top surface and the subsurface layers comprising a top subsurface layer below the top surface of the substrate. A protective material is patterned on the top surface of the device and a material removal process is performed to simultaneously form a contact trench and an isolation trench, the material removal process removing at least a portion of the top surface and the top subsurface layer such that the contact trench and the isolation trench are formed within the subsurface layer. An insulator is then formed within the isolation trench and the contact trench is lined with the insulator. The contact trench is then filled with a conductive material such that the conductive material is deposited over the insulator.
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