Semiconductor package including top-surface terminals for mounting another semiconductor package
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United States of America Patent
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Sep 27, 2011
Grant Date -
N/A
app pub date -
Jun 10, 2010
filing date -
May 1, 2002
priority date (Note) -
In Force
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Abstract
A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die is mounted on an electrically connected to a circuit substrate having terminals disposed on a bottom side for connection to an external system. The die and substrate are encapsulated and vias are laser-ablated or otherwise formed through the encapsulation to terminals on the top surface of the substrate that provide a grid array mounting lands to which another grid array semiconductor package may be mounted. The bottom side of the vias may terminate and electrically connect to terminals on the substrate, terminals on the bottom of the semiconductor package (through terminals) or terminals on the top of the semiconductor die. The vias may be plated, paste- filled, filled with a low melting point alloy and may have a conical profile for improved plating performance.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTD | SINGAPORE |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Hiner, David Jon | Chandler, US | 70 | 1625 |
| Huemoeller, Ronald Patrick | Chandler, US | 132 | 4147 |
| Rusli, Sukianto | Phoenix, US | 73 | 2570 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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