Reduced profile stackable semiconductor package

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8026589
SERIAL NO

12390999

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In accordance with the present invention, there is provided multiple embodiments of a reduced profile stackable semiconductor package. The semiconductor package comprises a substrate having at least one semiconductor die attached thereto. The semiconductor die is also electrically connected to the substrate by a plurality of conductive wires. A package body defining opposed top and bottom surfaces and a side surface at least partially encapsulates the substrate, the conductive wires and the semiconductor die. The package body is formed such that at least portions of the conductive wires are exposed in the top surface thereof. The package body may include a groove formed in the top surface thereof, with at least portions of the conductive wires being exposed in the groove. In this instance, conductive material layers may be disposed within the groove and electrically connected to the exposed portions of respective ones of the conductive wires, with solder pads further bring electrically connected to respective ones of the conductive material layers and at least partially residing within the groove.

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Patent Owner(s)

Patent OwnerAddress
AMKOR TECHNOLOGY SINGAPORE HOLDING PTE LTDSINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hwang, Chan Ha Anyang-si, KR 5 72
Kang, Won Joon Seodaemun-gu, KR 5 65
Kim, Bong Chan Seongnam-si, KR 34 232
Kim, Do Hyung Sunpo-si, KR 279 2748
Lee, Min Woo Mapo-gu, KR 86 248
Sohn, Eun Sook Sungdong-gu, KR 13 209

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