Stacked semiconductor package having adhesive/spacer structure and insulation

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8030134
APP PUB NO 20070018296A1
SERIAL NO

11536424

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Stacked semiconductor assemblies in which a first die is mounted active side upward on a first substrate and is electrically interconnected to the substrate by wire bonding; an adhesive/spacer structure is formed upon the active side of the first die; and a device such as a die or a package or a heat spreader, having an electrically nonconductive side, is mounted upon the adhesive/spacer structure with the electrically nonconductive side facing the first wire bonded die. The side of the device facing the first wire bonded die may be made electrically nonconductive by having an electrically insulating layer, such as a dielectric film adhesive. Also, methods for making the assemblies are disclosed.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
STATS CHIPPAC PTE LTE5 YISHUN STREET 23 SINGAPORE

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Karnezos, Marcos Palo Alto, US 76 4894
Kwon, Hyeog Chan Seoul, KR 27 384

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation