Method for continuity test of integrated circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 4, 2011
Grant Date -
Oct 8, 2009
app pub date -
Jun 20, 2008
filing date -
Apr 7, 2008
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The present invention provides a method for continuity test of integrated circuit. By using both pins of integrated circuit to measure a current of an electrostatic discharge device, the contact resistance of the integrated circuit can be obtained by calculating. The method comprises the steps: First, a DUT (device under test) is provided, and the DUT includes a second pin and the second pin connecting zero reference potential. Then, a voltage is applied to a first pin of DUT. Finally, the current through said first pin and said second pin would be measured. Therefore, the testing result of the DUT could be more precise and the quality of the DUT would be made sure.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully