QOS aware expansion mechanism
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United States of America Patent
Stats
-
Oct 11, 2011
Grant Date -
Feb 10, 2005
app pub date -
Sep 13, 2004
filing date -
Jul 12, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a data communication system comprising a plurality of peripherals having respective interfaces, the interfaces having device drivers and being coupled to a common bus for communication with a management system, the interfaces having different real time requirements; an ATM SAR and scheduler employs a predefined PHY level interface with different levels of service, the PHY interface being used as a QOS (Quality of Service) aware common master-slave bus for the peripherals which act as slave devices, whereby respective device driver requirements can be simplified or eliminated. A predefined PHY level interface is the ATM Forum UTOPIA, each peripheral being addressed as a separate UTOPIA slave port. The invention discloses how a system required to support interfaces with differing real time requirements may be supported through the use of a common bus.
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