Low-dropout voltage regulator with level limiter limiting level of output voltage when level of load current changes and method of operating the same
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United States of America Patent
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Oct 18, 2011
Grant Date -
Jun 24, 2010
app pub date -
Dec 10, 2009
filing date -
Dec 24, 2008
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Abstract
A low-dropout (LDO) voltage regulator that includes an error amplifier which compares a reference voltage with a feedback voltage of an output voltage and outputs an error signal based on the result of the comparison, the error amplifier being biased by an input voltage; a first MOS transistor having a gate electrically connected to the error signal, a source electrically connected to the input voltage and a drain electrically connected to the output voltage; a voltage divider which transmits a predetermined part of the output voltage to the error amplifier as feedback voltage; and a level limiter which limits a level of the output voltage from changing beyond and below an offset voltage when a level of a load current changes. In accordance with embodiments, A predetermined number of comparators and MOS transistor type-switches are provided to enhance the slew ratio of the regulated output voltage and to reduce standby electricity consumption.
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