Contact in planar NROM technology
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United States of America Patent
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Nov 8, 2011
Grant Date -
Sep 21, 2006
app pub date -
Mar 13, 2006
filing date -
Mar 17, 2005
priority date (Note) -
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Abstract
A method for fabricating a non-volatile memory array includes placing contacts over bit lines in a self-aligned manner. The placing includes forming self-aligned contact holes bounded by a second insulating material resistant to the removal of a first insulating material previously deposited over the bit lines, and depositing contact material, wherein the second insulating material blocks effusion of the contact material beyond the contact holes. The distance between neighboring bit lines in the array does not include a margin for contact misalignment.
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